Priority is claimed to Japanese Patent Application Number JP2004-222115 filed on Jul. 29, 2004, the disclosure of which is incorporated herein by reference in its entirety.
1. Technical Field
The present invention relates to a method of manufacturing a circuit device, more particularly to a method of manufacturing a circuit device whereby a thin-profile circuit device is realized.
2. Related Art
As electric appliances have become smaller in size and more sophisticated, miniaturization and density growth for circuit devices used therein has come to be required. With reference to FIGS. 9A to 9C, an example of a method of manufacturing a conventional circuit device will be described. The technology is described for instance in Japanese Patent Application Publication No. 2002-26198.
First, as shown in FIG. 9A, a contact hole 103 is formed on a substrate 101 formed of an insulating material such as resin, by use of a laser or the like. Thereafter, plated films 102A and 102B are formed on both sides of the substrate 101, including space inside the contact hole 103.
Subsequently, in FIG. 9B, by etching the plated films 102A and 102B, a first conductive pattern 102A is formed on the top surface of the substrate 101, and a second conductive pattern 102B on the back surface.
As shown in FIG. 9C, a semiconductor element 104 is mounted on the first conductive pattern 102A, and the first conductive pattern 102A and the semiconductor element 104 are connected electrically through a metal thin wire 105. Subsequently, the semiconductor element 104, the metal thin wire 105 and the first conductive pattern 102A are sealed with a sealing resin 107 to be covered therewith. Finally, the second conductive pattern 102B is coated with a solder resist 109, and an external electrode 108 is formed at the predetermined location. In this manner, a circuit device 100 is produced.
In the method of manufacturing the above-mentioned circuit device, however, a glass epoxy substrate has been used as the substrate 101, for supporting wirings during manufacturing processes. Therefore, it involves problems such as an increase in manufacturing cost, and limitations in producing smaller, thinner and lighter circuit devices due to the thickness of the substrate 101. Moreover, it has been pointed out that a heat dissipation property diminishes as a result of using the glass epoxy substrate.
Further, when the sealing resin 107 is being hardened, warps have been caused by the differences in thermal expansion coefficients between the substrate 101 and the sealing resin 107 as well as between the semiconductor element 104 and the sealing resin 107. This have developed into such a problem that the conductive pattern flakes off from the substrate 101, or that a poor contact occurs between the first conductive pattern 102B and the metal thin wire 105.
Still further, in the case where the glass epoxy substrate was adopted for the substrate 101, it has been critical to form the contact hole 103 for electric connection between the two surfaces thereof, thus prolonging the manufacturing process.
Furthermore, in the case of forming a conductive pattern where a large current flows, the electric capacity thereof has been ensured by increasing the planar dimension of a conductive pattern. Hence, miniaturization of a circuit device has been difficult.